The present invention relates in general to wafer scale power delivery systems, and more particularly, to fabrication methods and resulting semiconductor structures for wafer scale systems having improved thermal and mechanical stability characteristics.
A silicon wafer can have a width of about 300 millimeters (mm) and can contain 100-500 or more processors. A soldering process is typically employed in one or more operations of an integrated circuit (IC) fabrication process. The soldering process utilizes heat to facilitate the flow of solder which is used to mount various components. Following the fabrications operations, testing and verification of each individual IC is performed while the IC is still attached to the silicon wafer. The testing and verification processes are performed early in the manufacturing process in order to reduce cost and testing time.